Chapter 8 · 2001–2005

The wall

Three warnings, four years apart: a slide, a cancellation, an obituary. The free lunch was over.

The afternoons in this chapter
  • Pat Gelsinger (United States) — Showing a slide that said chips were heading for the power density of a nuclear reactor, and being applauded for it.
  • Herb Sutter (Canada) — Writing the essay that told every programmer the hardware would no longer save them.

For fifty years, the deal underneath software was simple. Write it slow if you have to — next year’s chips will make it fast. Chapter 5 named the trade; chapter 3 built the engine that paid for it. This chapter is about the engine seizing. It happens in three scenes.

Scene one: the prophecy. In 2001, Intel’s chief technology officer, Pat Gelsinger, stood up at a chip conference with a warning dressed as a slide. Processor power density — the heat squeezed through each square millimeter of silicon — was climbing a curve with no ceiling. Stay on the curve and chips would soon run as hot as a nuclear reactor. Then a rocket nozzle. Then the surface of the sun. The room applauded the line. Almost nobody heard the deadline inside it. Clock speed — the steps-per-second number that had meant “faster” since the beginning — was about to hit a wall made of heat.

Scene two: the wall itself. May 2004. Intel had been building its next great chip, codenamed Tejas, aimed somewhere north of 4 gigahertz on the old keep-clocking-faster plan. Engineers watched it turn into a furnace on the test bench. And Intel — the company Moore co-founded, the company that had set the industry’s clock for thirty years — cancelled its flagship mid-development and pivoted the whole roadmap to something quieter: two slower processors on one chip instead of one faster one. Dual-core. The doubling itself didn’t stop; transistor counts kept climbing right on Moore’s schedule. But the doubling changed currency. It stopped paying out in speed and started paying out in cores.

Look at the chart below, because this is the rare story a chart tells better than prose. For thirty years, two lines travel together — transistor counts and clock speeds, both climbing. Around 2004 they split like scissors opening. Transistors keep rising. Clocks flatline. And a third line is born where they part: cores per chip, rising from one to two to sixty-four. That scissor-cut is the single most consequential graph in modern computing.

Scene three: the obituary. March 2005. Herb Sutter, a software architect known to every C++ programmer, published an essay whose title did the work: “The Free Lunch Is Over.” He wrote down what the wall meant for the people upstairs, on the software side, and it was blunt. A faster clock had accelerated every program ever written, automatically, for free. A second core accelerates nothing. Existing software just sits there, using one core, while the other one idles. To use the new transistors, programmers would have to rewrite — split their programs into pieces that genuinely run at the same time.

And here’s the catch the essay landed hardest: writing that kind of software is one of the genuinely difficult things in the field. When two pieces of one program run at once, they can collide over shared data in ways that corrupt it quietly — or each wait forever on the other, frozen. Whole categories of bug that most programmers had never faced became everyone’s Tuesday. The free lunch hadn’t just ended. The bill arrived with homework attached.

So mark where the map stands in 2005. The hardware branch has hit a wall it will route around but never break through — clocks today sit barely above where they stalled twenty years ago. The software branch has been told to learn parallelism or stagnate. Every path forward now runs through doing many things at once instead of one thing faster. The industry answered three ways: it abstracted the machine itself (next chapter), it turned computing into a rentable utility (chapter 10), and it found a different kind of chip that was parallel all along (chapter 11).

The lunch line, it turned out, had just moved.

The scissors

Each line on its own scale — what matters is the shape. Together for thirty years, then 2004 cuts.

1970198019902000201020202004: the wallTransistors per chipClock speed (MHz)Cores per chip

Sources: Wikipedia, 'Transistor count' (per-chip figures cross-checked against manufacturer announcements); 4004 figure from Intel's own histories · Intel processor spec archives; Danowitz et al., 'CPU DB: Recording Microprocessor History' (Stanford, CACM 2012) · Manufacturer product lines (Intel, AMD); the 2005-2006 dual-core transition per Intel's Tejas cancellation coverage, May 2004